A 0.1–4 GHz SDR receiver with reconfigurable 10–100 MHz signal bandwidth in 65 nm CMOS
Analog integrated circuits and signal processing, 2013-12, Vol.77 (3), p.567-582 [Peer Reviewed Journal]Springer Science+Business Media New York 2013 ;ISSN: 0925-1030 ;EISSN: 1573-1979 ;DOI: 10.1007/s10470-013-0168-x
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