skip to main content
Guest
My Research
My Account
Sign out
Sign in
This feature requires javascript
Library Search
Find Databases
Browse Search
E-Journals A-Z
E-Books A-Z
Citation Linker
Help
Language:
English
Vietnamese
This feature required javascript
This feature requires javascript
Primo Search
All Library Resources
All
Course Materials
Course Materials
Search For:
Clear Search Box
Search in:
All Library Resources
Or hit Enter to replace search target
Or select another collection:
Search in:
All Library Resources
Search in:
Print Resources
Search in:
Digital Resources
Search in:
Online E-Resources
Advanced Search
Browse Search
This feature requires javascript
Search Limited to:
Search Limited to:
Resource type
criteria input
All items
Books
Articles
Images
Audio Visual
Maps
Graduate theses
Show Results with:
criteria input
that contain my query words
with my exact phrase
starts with
Show Results with:
Search type Index
criteria input
anywhere in the record
in the title
as author/creator
in subject
Full Text
ISBN
ISSN
TOC
Keyword
Field
Show Results with:
in the title
Show Results with:
anywhere in the record
in the title
as author/creator
in subject
Full Text
ISBN
ISSN
TOC
Keyword
Field
This feature requires javascript
BITCELL STATE RETENTION
Digital Resources/Online E-Resources
Citations
Cited by
View Online
Details
Recommendations
Reviews
Times Cited
External Links
This feature requires javascript
Actions
Add to My Research
Remove from My Research
E-mail
Print
Permalink
Citation
EasyBib
EndNote
RefWorks
Delicious
Export RIS
Export BibTeX
This feature requires javascript
Title:
BITCELL STATE RETENTION
Author:
AUGUSTINE CHARLES
;
TOMISHIMA SHIGEKI
;
LU SHIH LIEN L
;
TSCHANZ JAMES W
Subjects:
INFORMATION STORAGE
;
PHYSICS
;
STATIC STORES
Description:
본 개시 내용의 다양한 실시예에 따라서, STT(spin transfer torque) RAM(random access memeory)과 같은 MRAM인 STTRAM 메모리에서의 표류 자계 저감이 설명된다. 일 실시예에서, STTRAM에서의 비트 셀 비트 값 저장 상태들의 유지가, 메모리의 비트 셀들이 상태를 변경하도록 야기할 수 있는 표류 자계를 보상하기 위해 자계들을 생성함으로써 용이하게 될 수 있다. 또 다른 실시예에서, STTRAM에서의 비트 셀 비트 값 저장 상태들의 유지는, 메모리의 비트 셀들이 상태를 변경하도록 야기할 수 있는 표류 자계를 일시적으로 종료시키기 위해 메모리의 행에 대한 액세스를 선택적으로 중지시킴으로써 용이하게 될 수 있다. 다른 양태들이 본 명세서에 설명된다. In accordance with various embodiments of this disclosure, stray magnetic field mitigation in an MRAM memory such as a spin transfer torque (STT) random access memory (RAM), STTRAM is described. In one embodiment, retention of bitcell bit value storage states in an STTRAM may be facilitated by generating magnetic fields to compensate for stray magnetic fields which may cause bitcells of the memory to change state. In another embodiment, retention of bitcell bit value storage states in an STTRAM may be facilitated by selectively suspending access to a row of memory to temporarily terminate stray magnetic fields which may cause bitcells of the memory to change state. Other aspects are described herein.
Creation Date:
2022
Language:
English;Korean
Source:
esp@cenet
This feature requires javascript
This feature requires javascript
Back to results list
This feature requires javascript
This feature requires javascript
Searching Remote Databases, Please Wait
Searching for
in
scope:(TDTS),scope:(SFX),scope:(TDT),scope:(SEN),primo_central_multiple_fe
Show me what you have so far
This feature requires javascript
This feature requires javascript