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An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation

IEEE access, 2018-01, Vol.6, p.16046-16059 [Peer Reviewed Journal]

Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2018 ;ISSN: 2169-3536 ;EISSN: 2169-3536 ;DOI: 10.1109/ACCESS.2018.2816039 ;CODEN: IAECCG

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  • Title:
    An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation
  • Author: Nguyen, Xuan-Thuan ; Hoang, Trong-Thuc ; Nguyen, Hong-Thu ; Inoue, Katsumi ; Pham, Cong-Kha
  • Subjects: Accelerators ; Associative memory ; Bitmap index ; Clocks ; content-addressable memory ; data analytics ; energy efficiency ; Field programmable gate arrays ; FPGA ; Hardware ; hardware accelerator ; Indexing ; Parallel processing ; Random access memory ; SRAM-based CAM ; System effectiveness ; Task analysis ; Throughput
  • Is Part Of: IEEE access, 2018-01, Vol.6, p.16046-16059
  • Description: Bitmap index is recognized as a promising candidate for online analytics processing systems, because it effectively supports not only parallel processing but also complex and multi-dimensional queries. However, bitmap index creation is a time-consuming task. In this paper, by taking full advantage of massive parallel computing of field-programmable gate array (FPGA), two hardware accelerators of bitmap index creation, namely BIC64K8 and BIC32K16, are originally proposed. Each of the accelerator contains two primary components, namely an enhanced content-addressable memory and a query logic array module, which allow BIC64K8 and BIC32K16 to index 65 536 8-bit words and 32 768 16-bit words in parallel, at every clock cycle. The experimental results on an Intel Arria V 5ASTFD5 FPGA prove that at 100 MHz, BIC64K8 and BIC32K16 achieve the approximate indexing throughput of 1.43 GB/s and 1.46 GB/s, respectively. The throughputs are also proven to be stable, regardless the size of the data sets. More significantly, BIC32K16 only consumes as low as 6.76% and 3.28% of energy compared to the central-processing-unit- and graphic-processing-unit-based designs, respectively.
  • Publisher: Piscataway: IEEE
  • Language: English
  • Identifier: ISSN: 2169-3536
    EISSN: 2169-3536
    DOI: 10.1109/ACCESS.2018.2816039
    CODEN: IAECCG
  • Source: DOAJ : Directory of Open Access Journals
    IEEE Open Access Journals
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